確率的スピントロニクスプロセッサを開発(NUS researchers develop probabilistic spintronic processors for faster and greener optimisation)

2026-07-02 シンガポール国立大学(NUS)

シンガポール国立大学(NUS)のYang Hyunsoo教授らは、スピントロニクス素子を用いた確率的プロセッサを開発し、複雑な最適化問題を高速かつ省エネルギーで処理できることを実証した。磁気トンネル接合(MTJ)が生成する制御可能な乱数を活用する確率計算方式を採用し、第1の研究では144個のMTJを並列化した確率的Isingプロセッサを構築した。その結果、CPUと比べて3.2倍の高速化と58.3%の消費電力削減を達成し、二次割当問題ではD-Waveの量子アニーラよりも安定して実用的な解を得た。第2の研究では250個のスピン移行トルクMTJを用いたシステムを開発し、クラスタ並列更新法により疎結合グラフで10倍の高速化を実現したほか、シミュレーテッド量子アニーリングにより従来法比20倍の解品質向上とデバイスばらつきへの耐性向上を確認した。本研究は、量子コンピュータの実用化を待たずに、AI、物流、金融、電子設計自動化など幅広い最適化分野で利用可能な高性能・低消費電力計算基盤への道を開く成果である。

確率的スピントロニクスプロセッサを開発(NUS researchers develop probabilistic spintronic processors for faster and greener optimisation)
Prof Yang Hyunsoo and his team from the NUS Department of Electrical and Computer Engineering have made breakthroughs in computing by developing novel spintronics-based probabilistic processors that demonstrate gains in both speed and energy efficiency. (Image generated by AI using OpenAI Codex)

<関連情報>

250個の磁気トンネル接合に基づく確率的イジングマシン 250 magnetic tunnel junctions-based probabilistic Ising machine

Shuhan Yang,Andrea Grimaldi,Youwei Bao,Eleonora Raimondo,Jia Si,Giovanni Finocchio & Hyunsoo Yang
Nature Communications  Published:17 April 2026
DOI:https://doi.org/10.1038/s41467-026-72020-8

Abstract

In combinatorial optimization, probabilistic Ising machines have gained significant attention for their acceleration of Monte-Carlo sampling with the potential to reduce time-to-solution in finding approximate ground states. However, to be viable in real applications, further advances in scalability and energy efficiency are necessary. Here, we experimentally demonstrate a scalable probabilistic Ising machine based on 250 spin-transfer-torque magnetic tunnel junctions. Our computing approach integrates spintronic tunable true random number generators with advanced annealing techniques. For sparsely connected graphs, the proposed massive parallel architecture enables a cluster parallel update method that overcomes the serial limitations of Gibbs sampling, leading to a 10 times acceleration without hardware changes. Furthermore, we prove experimentally that the simulated quantum annealing boosts solution quality 20 times over conventional simulated annealing while also increasing robustness to device variability. In addition, we propose a next generation chiplet-based architecture for future large-scale, high-performance, and energy-efficient unconventional computing hardware.

 

効率的な二次最適化のための並列磁気トンネル接合型確率的イジングプロセッサ A parallel magnetic tunnel junction-based probabilistic Ising processor for efficient quadratic optimization

Shuhan Yang,Youwei Bao,Edward Humianto,Anil Prabhakar & Hyunsoo Yang
Nature Communications  Published:30 March 2026
DOI:https://doi.org/10.1038/s41467-026-71128-1

Abstract

Solving computationally demanding combinatorial optimization problems using conventional computing architectures is slow and energy intensive. Quantum computing could improve optimization efficiency but remains at an early stage. Probabilistic computing offers a practical near-term approach to faster optimization through stochastic techniques. Here, we experimentally demonstrate a scalable spin-transfer-torque-magnetic-tunnel-junction based probabilistic processor for efficiently solving all-to-all connected quadratic assignment problems. Our system integrates 144 compact spintronics tunable random number generators with a massively parallel architecture, achieving a high Monte-Carlo sampling throughput of 14.4 million flips per second. We co-design a parallel trial annealing scheme, and the integrated system achieves a 123× speedup with 98.3% energy savings over conventional Gibbs sampling, and a 3.2× speedup with 58.3% energy savings relative to the central processing unit implementation based on a compiled language. We further benchmark performance across graphics processing unit, and D-Wave quantum annealers, showing gains in solution quality, speed, and energy efficiency.

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