2Dフラッシュチップのブレークスルー（Breakthrough in 2D flash chip achieved）

2025-10-13 復旦大学

システム統合により実現した2Dフラッシュチップ

＜関連情報＞

• https://www.fudan.edu.cn/en/2025/1013/c344a146903/page.htm
• https://www.nature.com/articles/s41586-025-09621-8
• https://tiisys.com/blog/2025/04/18/post-165372/

システム統合により実現したフル機能の2Dフラッシュチップ A full-featured 2D flash chip enabled by system integration

Chunsen Liu,Yongbo Jiang,Boqian Shen,Shengchao Yuan,Zhenyuan Cao,Zhongyu Bi,Chong Wang,Yutong Xiang,Tanjun Wang,Haoqi Wu,Zizheng Liu,Yang Wang,Shuiyuan Wang & Peng Zhou
Nature  Published:08 October 2025
DOI:https://doi.org/10.1038/s41586-025-09621-8

Abstract

Two-dimensional (2D) materials have extended the device scalability^1,2,3 of silicon (Si) technology and enabled fundamental innovations in device mechanisms^4,5,6. Both industry^7,8,9 and academia^10,11,12,13, particularly in the field of integrated circuits, are pursuing integration breakthroughs to demonstrate the superiority of 2D electronics at the system level. Despite considerable integration progress on either 2D material integration^11,12,13 or 2D-CMOS hybrid integration¹⁴, a system that can migrate the advantages of the device to the application is still lacking. Here we report a full-featured 2D NOR flash memory chip realized by an atomic device to chip (ATOM2CHIP) technology, which combines a superior 2D electronic device as a memory core and a powerful CMOS platform to support complex instruction control. The ATOM2CHIP blueprint includes a full-stack on-chip process and a cross-platform system design, providing a complete framework to bridge the gap from emerging device concept to an applicable chip. The full-stack on-chip process is a specially designed flow that incorporates planar integration, three-dimensional (3D) architecture and chip packaging, contributing to a high yield of 94.34% based on a full-chip test. The cross-platform system design handles both the 2D circuit design and the 2D-CMOS modules compatibility verification design, contributing to a highly complex, instruction-driven, full-featured chip with 8-bit commands and 32-bit parallelism. These results demonstrate an efficient system integration strategy that showcases the advantages of the 2D electronic system.