2D材料とシリコンを組み合わせた新しい半導体技術 (UB researchers mix silicon with 2D materials for new semiconductor tech)

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2025-01-23 バッファロー大学 (UB)

バッファロー大学の研究者が、シリコンと2D材料(モリブデンジスルフィドなど)を組み合わせることで、新しい省エネ型半導体技術を開発しました。この研究は、電子の注入や輸送を効率化し、ナノエレクトロニクスの性能向上に貢献します。2D材料はシリコンと金属間の接触抵抗を減少させる役割を果たし、エネルギーバンド構造と電荷輸送メカニズムの理解を深める重要な成果を提供しています。この技術は将来的に、より小型で高性能な電子デバイスの実現を促進する可能性があります。

<関連情報>

二次元単分子膜を介した巨大な面外電荷整流とコンダクタンス Enormous Out-of-Plane Charge Rectification and Conductance through Two-Dimensional Monolayers

Anthony Cabanillas,Simran Shahi,Maomao Liu,Hemendra Nath Jaiswal,Sichen Wei,Yu Fu,Anindita Chakravarty,Asma Ahmed,Xiaochi Liu,Jian Sun,Cheng Yang,Won Jong Yoo,Theresia Knobloch,Vasili Perebeinos,Antonio Di Bartolomeo,Tibor Grasser,Fei Yao,Huamin Li
ACS Nano  Published: January 15, 2025
DOI:https://doi.org/10.1021/acsnano.4c15271

Abstract

2D材料とシリコンを組み合わせた新しい半導体技術 (UB researchers mix silicon with 2D materials for new semiconductor tech)

Heterogeneous integration of emerging two-dimensional (2D) materials with mature three-dimensional (3D) silicon-based semiconductor technology presents a promising approach for the future development of energy-efficient, function-rich nanoelectronic devices. In this study, we designed a mixed-dimensional junction structure in which a 2D monolayer (e.g., graphene, MoS2, and h-BN) is sandwiched between a metal (e.g., Ti, Au, and Pd) and a 3D semiconductor (e.g., p-Si) to investigate charge transport properties exclusively in an out-of-plane (OoP) direction. The role of 2D monolayers as either an OoP metal-to-semiconductor charge injection barrier or an OoP semiconductor-to-metal charge collection barrier was comparatively evaluated. Compared to monolayer graphene, monolayer MoS2 and h-BN effectively modulate OoP metal-to-semiconductor charge injection through a barrier tunneling effect. Their effective OoP resistance and resistivity were extracted using a resistors-in-series model. Intriguingly, when functioning as a semiconductor-to-metal charge collection barrier, all 2D monolayers become electronically “transparent” (close to zero resistance) when a high OoP voltage (greater than the built-in voltage) is applied. As a mixed-dimensional integrated diode, the Ti/MoS2/p-Si and Au/MoS2/p-Si configurations exhibit both high OoP rectification ratios (5.4 × 104) and conductance (1.3 × 105 S/m2). Our work demonstrates the tunable OoP charge transport characteristics at a 2D/3D interface, suggesting the opportunity for 2D/3D heterogeneous integration, even with sub-1 nm thick 2D monolayers, to enhance modern Si-based electronic devices.

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