アナログ・コンピューティングが複雑な方程式を解き、はるかに少ないエネルギー消費で済むことを示す新たな研究結果(New Study Shows Analog Computing Can Solve Complex Equations and Use Far Less Energy)

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2024-03-15 マサチューセッツ大学アマースト校

A 300 mm wafer with hundreds of fully integrated memristor systems-on-chip. Each chip has 10 256×256 one transistor one memristor crossbar arrays and on-chip peripheral circuits. Photo courtesy of TetraMem Inc.
A 300 mm wafer with hundreds of fully integrated memristor systems-on-chip. Each chip has 10 256×256 one transistor one memristor crossbar arrays and on-chip peripheral circuits. Photo courtesy of TetraMem Inc.

マサチューセッツ大学アムハースト校のエンジニアを含む研究チームは、デジタルコンピューティングの制限を回避しながら、複雑な科学計算タスクを完了できるアナログコンピューティングデバイスであるメモリスターを証明しました。このメモリスター技術は、データ転送の数を減らすことでボトルネックを回避し、データとメモリの間を移動する必要がなく、計算を実行します。これにより、高速化とエネルギー消費の低減が可能になります。

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アナログコンピューティングのための任意に高精度なメモリスタアレイのプログラミング Programming memristor arrays with arbitrarily high precision for analog computing

WENHAO SONG , MINGYI RAO , YUNNING LI, CAN LI , […], AND J. JOSHUA YANG
Science  Published:22 Feb 2024
DOI:https://doi.org/10.1126/science.adi9405

Editor’s summary

In-memory computing can execute a large vector-matrix multiplication (VMM) within one computing cycle, but the relatively low precision of these analog methods has precluded its use with conventional computing. Song et al. show that for one-memristor-one-transistor arrays, most of the VMM can be performed to arbitrarily high precision before being output as a digital result (see the Perspective by Aimone and Agarwal). After a computation step by an array, subarrays dynamically compensate for residual errors of the previously programmed array. This method was used experimentally to solve partial differential equations with remarkable precision (<10−15 error) and with higher energy efficiency than digital computing. —Phil Szuromi

Abstract

In-memory computing represents an effective method for modeling complex physical systems that are typically challenging for conventional computing architectures but has been hindered by issues such as reading noise and writing variability that restrict scalability, accuracy, and precision in high-performance computations. We propose and demonstrate a circuit architecture and programming protocol that converts the analog computing result to digital at the last step and enables low-precision analog devices to perform high-precision computing. We use a weighted sum of multiple devices to represent one number, in which subsequently programmed devices are used to compensate for preceding programming errors. With a memristor system-on-chip, we experimentally demonstrate high-precision solutions for multiple scientific computing tasks while maintaining a substantial power efficiency advantage over conventional digital approaches.

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